The Bus Interface Unit

8086 Internal Architecture

The Queue

- While the EU is decoding an instruction or executing an instruction which does not require use of the buses, the BIU fetches upto 6 instruction byte for the following instructions.

- The BIU stores these pre-fetched bytes in a first in first out register set called Queue.

- When the EU is ready for its next instruction, it simply reads the instruction byte(s) for the instruction from the queue in the BIU.

- This is much faster than sending out an address to the system memory and waiting for memory to send back the next instruction byte or bytes.

- Fetching the next instruction while the current instruction executes is called Pipelining.

Segment Registers

- The 8086 BIU sends out 20 bit addresses, so it can address any of 2^20 bytes in memory.

- However, at any given time the 8086 works with only 4 segments within this 1 Mb range.

- Four segment registers in the BIU are used to hold the upper 16 bits of the starting address of four memory segments that the 8086 is working with at a particular time.

- The four segment registers are:-
   + Code Segment (CS) register:
                                                    The register contains the initial address of the code segment. The address plus the offset value contained in the Instruction Pointer(IP) indicates the address of an instruction to be fetched for execution.

   + Stack Segment (SS) register:
                                                    The initial address of the stack segment plus value in the Stack Pointer(SP) is used for stack operations.

   + Extra Segment (ES) register:
                                                    ES is used by some string operations. Contains initial address of the extra segment. String instructions always use ES and Destination Index(DI) registers to calculate the physical address for the destination.

   + Data Segment (DS) register:
                                                  The initial address of the current data segment address plus offset value in instruction causes a reference to a specific location in the data segment.

- The BIU always inserts zeros for the lowest 4 bits (nibble) of the 20bit starting address for segment.
For example: if the Code Segment register contains 348AH, then the code segment will start at 348A0H.

- This constraint was put on the location of Segment so that it is only necessary to store and manipulate 16 bit numbers when working with the starting address of a segment.

- The part of a segment starting address stored in a segment register is often called the Segment Base.

- A stack is a section of memory set aside to store address and data while a subprogram executes.

- The extra Segment register and the data Segment register are used to hold the upper 16 bits of the starting address of 2 memory segments that are used for data.

One way four 64Kb segments might be positioned within the 1 Mb address space of an 8086.

Instruction Pointer

- The instruction pointer register holds the 16-bit address, or offset of the next code byte within this code segment.
- The value contained in the IP is reffered to as an offset because this value must be offset from(added to) the segment base address in CS to produce the required 20bit physical address sent out by the BIU.

Addition of IP to CS to produce the physical address of the code byte

- An alternative way of representing a 20bit physical address is the segment base:offset form. For the address of a code byte, the format for this alternative form will be CS:IP. Eg: 348A:4214

Stack Segment Register and Stack Pointer Register

- The 8086 allows you to set aside an entire 64Kb segment as stack. The upper 16 bits of the starting address for this segment are kept in the stack segment register.

- The Stack Pointer(SP) register in the execution unit holds the 16bit offset from the start of the segment to the memory location where a word was most recently stored on the stack.

- The memory location where a word was most recently stored is called the top of the stack.

Addition of SS and SP to produce the physical address of the top of the stack

- The physical address can also be represented as SS:SP i.e. 5000:FFE0H.

Execution Unit

Pointer and Index Registers in The Execution Unit

- In addition to the stack pointer register(SP), the EU contains a 16 bit base pointer(BP) register.

- It also contains 16bit source index(SI) register and a 16 bit destination index (DI) register.

- Those 3 register can be used for temporary storage of data just as the general purpose registers.

- However, their main purpose(use) is to hold the 16bit offset of a data word in one of the segments.

- The physical address of the data in memory is given by adding SI to DS.